Vijay's Coding Portfolio
Table of Contents
| Name | What is it? | Link |
|---|---|---|
| Cognateful | LLM-Powered Language Learning | View |
| NeRFs from Scratch | Implemented NeRFs (Neural Radiance Fields) to reconstruct a rotating 3D scene from 2D images. | View |
| Flow Matching Models from Scratch | Implemented a flow-matching generative model with classifier-free guidance (CFG) to synthesize novel handwritten digits from noise. | View |
| GSO: Challenging Software Optimization Tasks for Evaluating SWE-Agents | Designed automated pipeline to evaluate SWE agents | View |
| PintOS (Operating Systems Class Project) | Implemented kernel extensions for the PintOS operating system | View |
| RISC-V CPU | Designed, implemented, and tested RISC-V CPU design for FPGA | View |
| The David Deutsch Dictionary | Online database of quotes with Google Sheets backend | View |
More Info
Project Name
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Description
Interactive language-learning app that teaches you French using stories written in French, with translation exercises that are scored using large language model judgements.
Designed and implemented a NeRF (Neural Radiance Field) model in PyTorch based on the original NeRF paper. Successfully reconstructed a 3D scene of a rotating LEGO truck from a set of 2D views.
Implemented flow matching generative model in PyTorch using a time and class-conditioned UNet.
Trained the model on MNIST with conditional dropout to support classifier-free guidance during inference.
Built sampling + visualization pipeline to generate GIFs showing emergence of digits over time.
Paper Accepted at NeurIPS 2025 (Datasets & Benchmarks Track): Coauthored Global Software Optimization (GSO), an LLM code optimization benchmark spanning 102 optimization problems and five programming languages.
PintOS (Operating Systems Class Project)
Built a transaction-safe Unix-like file system with hierarchical inode structure, resizable files, and rollback recovery. Developed an in-memory buffer cache with fine-grained locking for concurrent disk I/O. Implemented a POSIX-style threading subsystem with kernel-level synchronization primitives and priority scheduling to enable true parallel execution.
RISC-V CPU
Implemented RISC-V CPU in SystemVerilog with Zephyr RTOS and M-Extension (multipication and division) support; flashed the design onto AMD Zynq FPGA board and achieved operating clock speed of 150 MHz. Implemented three-stage pipelining to increase CPU throughput.
Online database of quotes from science author and quantum physicist David Deutsch. Utilizes Google Sheets as a backend database to allow for seamless and near-real-time updates. Scraped quotes off the internet using Python3 and NLTK (Natural Language Tool Kit). Designed UI using Flask and HTML.